A NAND flash memory (hereinafter simply referred to as “NAND memory”) as a nonvolatile memory has advantages such as high speed and light weight compared with a hard disk. An increase in a capacity and an increase in a degree of integration of the NAND memory are easily performed compared with other flash memories including a NOR flash memory. A solid state drive (SSD) mounted with the NAND memory having these characteristics attracts attention as a large-capacity external storage device replacing a magnetic disk device.
As one of problems in replacing the magnetic disk device with the SSD mounted with the NAND memory, the number of times of reading and writing (in particular, writing) accesses that the NAND memory can withstand (the limited number of accesses) is small. As one of solutions for the problem, data is written in the NAND memory through a memory (a random access memory (RAM)) readable and writable at high speed such as a dynamic RAM (DRAM). Specifically, small volume data transmitted from a host apparatus is stored in the RAM and, when the small volume data can be treated as large volume data, the data stored in the RAM is written in the NAND memory in large units such as block units (see, for example, Japanese Patent Application Laid-Open No. 2008-33788). In a system often adopted, concerning data that needs to be written in the NAND memory while being maintained as the small volume data, writing in page unit in block is performed in page units to reduce fatigue of the NAND memory.
In recent years, as the NAND memory, there are an increasing number of NAND memories to which a multi-value technology for storing a plurality of bits in one cell is applied. For example, in a NAND memory that can store two bits in one cell, the bits stored in the one cell are referred to as lower bit and upper bit in order of writing. A page including the lower bit is referred to as lower page and a page including the upper bit is referred to as upper page.
As the SSD that performs writing in the NAND memory via the RAM explained above, there are an increasing number of SSDs in which a multi-value NAND memory is applied to the NAND memory. In such SSDs, attention needs to be paid when intra-block write-once is performed in page units. This is because, if a writing error (a program error, instantaneous stop, etc.) occurs while data is written in the upper page, data stored in the lower page cannot be guaranteed. Therefore, backup of the lower page with respect to the upper page at a writing destination is necessary until the writing in the upper page ends without a trouble. In the past, when data that cannot be guaranteed is present when writing in the NAND memory is performed, operation for backing up the data in another block in the NAND memory is performed. The operation causes a fall in writing speed of the SSD.